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Six-String White LED Driver with Active
Current Balancing for LCD Panel Applications
Detailed Description
The MAX8790 is a high-efficiency driver for arrays of
white LEDs. It contains a fixed-frequency, current-
mode, PWM step-up controller, 5V linear regulator, dim-
ming control circuit, and six regulated current sources
(see Figure 2). When enabled, the step-up controller
boosts the output voltage to provide sufficient head-
room for the current sources to regulate their respective
string currents. The MAX8790 features selectable
switching frequency (500kHz, 750kHz, or 1MHz), which
allows trade-offs between external component size and
operating efficiency. The control architecture automati-
cally skips pulses at light loads to improve efficiency
and prevents overcharging the output capacitor.
A PWM logic input signal, BRT, controls the LED bright-
ness. The MAX8790 supports both analog and digital
control of the LED current, and achieves 100:1 dimming
range. The MAX8790’s dimming control circuit consists
of a PLL, a digital comparator, and a DAC. In direct
DPWM mode, the step-up controller and current source
are directly turned on and off by the PWM signal. In ana-
log dimming mode, an internal PLL, digital comparator,
and DAC circuit translate the PWM signal into an analog
signal that linearly controls the LED current, down to a
PWM duty factor of 12.5%.
The MAX8790 has multiple features to protect the con-
troller from fault conditions. Separate feedback loops
limit the output voltage if one or more LEDs fail open or
short. During operation, if one of the feedback string
voltages exceeds the V CC to 0.6V (typ) protection
threshold, the controller shuts down and latches off
after an internal timer expires. The controller features
cycle-by-cycle current limit to provide consistent opera-
tion and soft-start capability. A thermal-shutdown circuit
provides another level of protection.
The MAX8790 includes a 5V linear regulator that pro-
vides the internal bias and gate drive for the step-up
controller. When an external 5V is available, the internal
LDO can be overdriven to decrease power dissipation.
Otherwise, connect the IN pin to an input greater than
5.5V. The internal LDO is disabled when SHDN is low.
V IN
7V TO 21V
C IN
0.1 μ F
L1
4.7 μ H
D1
C OUT
V OUT
UP TO 35V
SHDN
IN
EXT
N1
V CC
1 μ F
ENA
ISET
BRT
FSET
CS
GND
R S
56m Ω
511k Ω
N.C.
OSC
R1
1M Ω
OV
1.2k Ω
CCV
MAX8790
R2
37.4k Ω
0.1 μ F
FB1
CPLL
0.1 μ F
EP
Figure 1. Typical Operating Circuit
FB2
FB3
FB4
FB5
FB6
10
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